* Generate DDR Memory Termination Voltage (VTT)
* For DDR, DDR−2, DDR−3 and DDR−4 Source / Sink Currents
* Supports Loads Up to ±3 A (Typ), Output is Over−Cur.
Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable*
* This is a Pb−Free Devi.
Pin Number Pin Name
Pin Function
1 VRO OUTPUT − Buffered Output of VRI Reference Input pin. 2 VCC INPUT − Regulator Analog Power Input pin. Connect to the system supply voltage. Bypass VCC to AGND
with a 1 mF or greater ceramic capacitor.
3
AGND.
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